Wired Terminals in Subdiagrams

Wired Terminals in Subdiagrams

{"minExpandLevel":2} LabVIEW VI Analyzer Toolkit Block Diagram Performance Arrays and Strings in Loops Coercion Dots Enabled Debugging In Place Element Structure Usage Inlinable VIs Parallel For Loop Debugging Parallelizable Loops Prepend Scalar With Build Array Redundant Boolean Operations Value Property Usage Wait in While Loop Wired Terminals in Subdiagrams Style Array Constant Style Backwards Wires Case Structure Default Frame Code Simplification Control Terminal Label Visible Control Terminal Wiring Diagram Disable Structures Mixed Terminal Styles Node Density Poor Names of Enum Items Sequence Structure Usage String Constant Style Tunnel Position Unused Code Wire Bends Wire Crossings Wires Under Objects Warnings Adding Array Size Elements Array Sum and Product Overflow Breakpoint Detection Bundling Duplicate Names Case Structure with String Range Error Cluster Wired Find Deprecated Items For Loop Error Handling For Loop Iteration Count For Loop Reference Handling Globals and Locals Hidden Objects in Structures Hidden Tunnels Indexer Datatype Pattern Label Reentrant VI Issues Type Casting References Typedef Cluster Constants Unwired I32 Error Complexity Metrics Cyclomatic Complexity Depth of Nesting of Structures Fan In Fan Out Modularity Index Documentation Developer Approved Bookmark Tags Comment Usage Label Call Library Nodes Revision History User Spell Check VI Documentation Front Panel SubVI Array Default Values Cluster Sized to Fit Control Alignment User Interface Alignment Grid Setting Clipped Text Dialog Controls Duplicate Control Labels Empty List Items Font Usage Overlapping Controls Panel Size and Position Scalar Chart Updates Synchronous Display Transparent Labels General File Properties SubVI and TypeDef Locations VI Extension VI Name VI Saved Version VI Size Icon and Connector Pane Connected Pane Terminals Connector Pane Alignment Connector Pane Pattern Default Icon Error Style Full Connector Pane Icon Size and Border Polymorphic Terminals Terminal Connection Type Terminal Positions VI Properties Auto Error Handling Enabled Broken VI Built Application Compatibility Control VI Type Driver Usage Platform Portability Removed Diagram Separate Compiled Code Setting Toolkit Usage VI Lock State VI Metrics Connector Inputs and Outputs Controls and Indicators Diagram Count Diagram Size Node Count Property Reads and Writes Shared Library Calls Structure Count Wire Sources

Wired Terminals in Subdiagrams is a VI Analyzer test installed by the LabVIEW VI Analyzer Toolkit add-on. It checks if any control or indicator that is wired on the connector pane does not reside within the top-level diagram.

Explanation

To avoid unnecessary memory copies, control and indicator terminals that are wired on the connector pane should be placed on the top-level diagram.