https://labviewwiki.org/w/index.php?action=history&feed=atom&title=Wired_Terminals_in_Subdiagrams 2026-05-08T10:33:12Z Revision history for this page on the wiki MediaWiki 1.43.0 https://labviewwiki.org/w/index.php?title=Wired_Terminals_in_Subdiagrams&diff=33776&oldid=prev 2024-08-20T07:11:59Z

<p>Created page with &quot;{{LabVIEW VI Analyzer Toolkit Infobox|tree-category=block diagram|tree-subcategory=performance}} &#039;&#039;&#039;Wired Terminals in Subdiagrams&#039;&#039;&#039; is a <a href="/wiki/VI_Analyzer" title="VI Analyzer">VI Analyzer</a> test installed by t...&quot;</p> <p><b>New page</b></p><div>{{LabVIEW VI Analyzer Toolkit Infobox|tree-category=block diagram|tree-subcategory=performance}}<br /> <br /> &#039;&#039;&#039;Wired Terminals in Subdiagrams&#039;&#039;&#039; is a [[VI Analyzer]] test installed by the [[LabVIEW VI Analyzer Toolkit]] add-on. It checks if any [[control]] or [[indicator]] that is wired on the [[connector pane]] does not reside within the top-level diagram.<br /> <br /> ==Explanation==<br /> To avoid unnecessary memory copies, control and indicator terminals that are wired on the connector pane should be placed on the top-level diagram.<br /> <br /> {{stub}}<br /> <br /> [[Category:VI Analyzer Tests]]<br /> [[Category:LabVIEW VI Analyzer Toolkit]]</div>

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